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  data sheet, revision 3.1, december 2006 tua 6045-2 low power 3-band digital tv / portable tuner ic taifun 3 communication solutions
edition 2006-12-19 published by infineon technologies ag 81726 mnchen, germany ? infineon technologies ag 2006. all rights reserved. legal disclaimer the information given in this document shall in no event be regarded as a guarantee of conditions or characteristics (?beschaffenheitsgarantie?). with respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, infineon technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non- infringement of intellectual property rights of any third party. information for further information on technology, delivery terms and conditions and prices please contact your nearest infineon technologies office ( www.infineon.com ). warnings due to technical requirements components may contain dangerous substances. for information on the types in question please contact your nearest infineon technologies office. infineon technologies components may only be used in life-support devices or systems with the express written approval of infineon technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. if they fail, it is reasonable to assume that the health of the user or other persons may be endangered.
data sheet, revision 3.1, december 2006 tua 6045-2 low power 3-band digital tv / portable tuner ic taifun 3 communication solutions
tua 6045-2 data sheet 4 revision 3.1, 2006-12-19 tua 6045-2 ?taifun 3? revision history: 2006-12-19 data sheet, revision 3.1 previous version: 2006-09-12 preliminary specification, revision 3.0 page subjects (major changes since last revision) 9 - 11 , 28 , 30 - 41 l-band application added. operating range and ac/dc characteristics extended for l-band. 31 - 41 table footnote added with description for impedance measurement. we listen to your comments any information within this document that you feel is wrong, unclear or missing at all? your feedback will help us to continuously improve the quality of this document. please send your proposal (including a reference to this document) to: horst.klein@infineon.com
table of contents page data sheet 5 revision 3.1, 2006-12-19 list of tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 list of figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 1 product info . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2 product description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.1 features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.1.1 general . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.1.2 mixer/oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.1.3 saw filter driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2.1.4 if agc amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2.1.5 pll . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2.1.6 if switch and loop through for tuner alignment . . . . . . . . . . . . . . . . . . 11 2.2 application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2.2.1 recommended band limits in mhz . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3 functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3.1 pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3.2 pin definition and functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 3.3 functional block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 3.4 circuit description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 3.4.1 mixer-oscillator-block, saw filter driver . . . . . . . . . . . . . . . . . . . . . . . . 22 3.4.2 rf agc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 3.4.3 if agc amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 3.4.4 pll block, xtal oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 3.4.5 bus interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 3.4.6 dc/dc clock output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 3.4.7 power-on reset, stand-by condition . . . . . . . . . . . . . . . . . . . . . . . . . . 24 3.4.8 if switch, loop thru . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 4 applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 4.1 tuner application block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 4.2 application circuit for hybrid application . . . . . . . . . . . . . . . . . . . . . . . . . . 27 4.3 application circuit for l-band application . . . . . . . . . . . . . . . . . . . . . . . . . . 28 5 reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 5.1 electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 5.1.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 5.1.2 operating range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 5.1.3 ac/dc characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 5.2 bus interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 5.3 bus data format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 5.4 bus timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 5.5 data byte specification, function and defaults . . . . . . . . . . . . . . . . . . . . . 48
data sheet 6 revision 3.1, 2006-12-19 tua 6045-2 taifun 3 5.5.1 write data registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 5.5.2 read data registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 5.6 measurement circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 5.6.1 gain (gv) measurement in low band . . . . . . . . . . . . . . . . . . . . . . . . . 59 5.6.2 gain (gv) measurement in mid and high bands . . . . . . . . . . . . . . . . 59 5.6.3 matching circuit for optimum noise figure in low band . . . . . . . . . . . . 60 5.6.4 noise figure (nf) measurement in low band . . . . . . . . . . . . . . . . . . . 60 5.6.5 noise figure (nf) measurement in mid and high bands . . . . . . . . . . . 61 5.6.6 cross modulation measurement in low band . . . . . . . . . . . . . . . . . . . 61 5.6.7 cross modulation measurement in mid and high bands . . . . . . . . . . . 62 5.6.8 ripple susceptibility measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 6 package pg-vqfn-48 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
data sheet 7 revision 3.1, 2006-12-19 tua 6045-2 table 1 atsc tuners . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 table 2 dvb-t and analog tuners . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 table 3 isdb-t tuners . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 table 4 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 table 5 operating range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 table 6 ac/dc characteristics, t a = 25c, v cc = 3.3v . . . . . . . . . . . . . . . . . . 31 table 7 pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 table 8 chip address organization in i2c mode . . . . . . . . . . . . . . . . . . . . . . . 42 table 9 address selection in i2c mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 table 10 sub addresses of write data registers . . . . . . . . . . . . . . . . . . . . . . . 42 table 11 sub addresses of read data registers . . . . . . . . . . . . . . . . . . . . . . . 43 table 12 bus data format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 table 13 bus timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 table 14 subaddress 00h, main divider . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 table 15 subaddress 01h, control bytes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 table 16 subaddress 02h, reference divider r and crystal oscillator control 50 table 17 subaddress 03h, agc control and if signal processing control . . . . 52 table 18 subaddress 04h, dc-dc converter . . . . . . . . . . . . . . . . . . . . . . . . . . 54 table 19 subaddress 06h, mode bytes, test mode and standby control . . . . 55 table 20 subaddress 80h, status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 table 21 subaddress 8eh, chip code ?6045? . . . . . . . . . . . . . . . . . . . . . . . . . . 57 table 22 subaddress 8fh, revision code, advanced with design steps . . . . . 58 list of tables
data sheet 8 revision 3.1, 2006-12-19 tua 6045-2 figure 1 pin configuration tua 6045-2 in vqfn-48 package . . . . . . . . . . . . . 13 figure 2 block diagram tua 6045-2 in vqfn-48 package. . . . . . . . . . . . . . . . 21 figure 3 functional block diagram of if switch and loop thru . . . . . . . . . . . . . 25 figure 4 tuner application block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 figure 5 circuit diagram for hybrid application (dvb-t / pal). . . . . . . . . . . . . . 27 figure 6 circuit diagram for l-band application. . . . . . . . . . . . . . . . . . . . . . . . . 28 figure 7 i2c bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 figure 8 3-wire bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 figure 9 gain (gv) measurement in low band . . . . . . . . . . . . . . . . . . . . . . . . 59 figure 10 gain (gv) measurement in mid and high bands. . . . . . . . . . . . . . . . 59 figure 11 matching circuit for optimum noise figure in low band . . . . . . . . . . . 60 figure 12 noise figure (nf) measurement in low band. . . . . . . . . . . . . . . . . . . 60 figure 13 noise figure (nf) measurement in mid and high bands . . . . . . . . . . 61 figure 14 cross modulation measurement in low band . . . . . . . . . . . . . . . . . . 61 figure 15 cross modulation measurement in mid and high bands . . . . . . . . . . 62 figure 16 ripple susceptibility measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 figure 17 pg-vqfn-48 vignette . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63 figure 18 pg-vqfn-48 outline drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63 list of figures
data sheet 9 revision 3.1, 2006-12-19 tua 6045-2 taifun 3 product info 1 product info general description the tua 6045-2 integrates the mixer-oscillator, agc amplifier and a digitally programmable phase lock loop (pll). this makes the tua 6045-2 an ideal product for applications where size and low power consumption are required design key factors. typical applications include tv's, vcr's, set top boxes (stb) and also a range of portable products. ordering information type ordering code package tua 6045-2 sp000250164 pg-vqfn-48 features general ? suitable for pal, ntsc, secam, dvb, dmb, dab, isdb-t and atsc  high band covers frequency range for l-band up to 1.5 ghz  supply voltage range from 3 to 5.5 v  combined small - wide agc detection  agc + agc buffer output  low phase noise  full esd protection  qualified according to jedec for consumer applications mixer/oscillator  three band tuner  unbalanced highohmic low band input  balanced lowohmic mid band input  balanced lowohmic high band input  two pin oscillators for low/mid band  four pin oscillator for high band if-amplifier  4 if pins to connect a 2 pole bandpass  symmetrical saw driver  fully balanced if agc amplifier pll i 2 c / three wire combi bus  4 independent i 2 c addresses  high voltage vco tuning output two pmos ports  one voltage referred port  internal low/mid/high band switch  xtal oscillator, range from 4 to 16 mhz  xtal buffer output with programmable level and output divider  clock generator for dc/dc converter with programmable low and high time power management  bus controlled stand by mode application  the ic is suitable for pal, ntsc, secam, dvb-c, dvb-t, dvb-h, dmb-t, dab, isdb-t, atsc and l- band tuners.
data sheet 10 revision 3.1, 2006-12-19 tua 6045-2 taifun 3 product description 2 product description the tua 6045-2 integrates the mixer-oscillator, variable agc output amplifier and a digitally programmable phase lock loop (pll) not requiring an external high voltage buffer. furthermore, the tua 6045-2 integrates a buffered rf agc and programmable clock signals for an external dc-dc up converter. the integrated mixer oscillator function comprises of three balanced mixers. the first mixer has an unbalanced high impedance input while the other two have balance low impedance inputs. the tuner also has firstly, 2-pin asymmetric oscillators for both low and mid bands and secondly a 4-pin symmetrical oscillator for high band operations including a band selector switch. the output signal from the mixer is amplified via a saw filter driver followed by variable gain amplifier stage in order to achieve a constant output level used for a/d conversion. all functions can be programmed with up to four different ic addresses. also, the pll connected to a 4-16 mhz reference crystal which is buffered on-chip, allows the setting of the tuner oscillator with a minimum step size of 20 khz. a lock flag will be set once the pll is locked and communicated via the i2c/3-wire bus. the complete control setting of the ic is done by a microprocessor via the i2c/3-wire bus. the device also has three output ports of which p2 can be configured as a programmable output voltage port. 2.1 features 2.1.1 general  supply voltage range 3 to 5.5 v.  suitable for pal, ntsc, secam, dvb-t/h/ c, dab, isdb-t, atsc and l-band.  wideband and narrow agc detectors for tuner rf agc ? 5 programmable take-over points ? 2 programmable time constants.  low phase noise.  full esd protection. 2.1.2 mixer/oscillator  high impedance mixer input (common emitter) for low band.  low impedance mixer input (common base) for mid band.  low impedance mixer input (common base) for high band.  2 pin oscillator for low band.  2 pin oscillator for mid band.  4 pin oscillator for high band.  oscillator for high band divided by 3 available for mid band mixer.
data sheet 11 revision 3.1, 2006-12-19 tua 6045-2 taifun 3 product description 2.1.3 saw filter driver  symmetrical if preamplifier with low output impedance able to drive a compensated saw filter (500 ? //40 pf). 2.1.4 if agc amplifier  symmetrical variable gain if output amplifier with low noise, high linearity, high dynamic range. 2.1.5 pll  4 independent i 2 c addresses, or 3-wire bus mode. i 2 c bus protocol compatible with 3.3 v and 5v micro-controllers up to 400 khz.  high voltage vco tuning output.  3 pnp ports, one of them realized as programmable voltage output.  1 clock output for external dc/dc upconversion to generate the tuning supply voltage, may be used as npn port.  stand-by programmable for functional blocks allows customized ramping.  internal low/mid/high band switch.  lock-in flag.  4 to 16 mhz crystal oscillator with programmable output buffer.  programmable reference divider ratios.  4 charge pump currents, programmable in 15 steps. 2.1.6 if switch and loop through for tuner alignment  2 programmable switches to bypass the bandpass/saw filter to facilitate the tuner pre-stage alignment. 2.2 application  the ic is suitable for pal, ntsc, secam, dvb-t/h/c, dab, isdb-t, atsc and l- band tuners.  the integrated rf agc control has wide band detectors at the mixer inputs and a narrowband detector at the saw filter driver output.
data sheet 12 revision 3.1, 2006-12-19 tua 6045-2 taifun 3 product description 2.2.1 recommended band limits in mhz table 1 atsc tuners table 2 dvb-t and analog tuners table 3 isdb-t tuners note: tuning margin of 3 mhz not included. rf input oscillator band min. max. min. max. low 55.25 157.25 101 203 mid 163.25 451.25 201 479 high 457.25 861.25 503 907 rf input oscillator band min. max. min. max. low 48.25 154.25 87.15 193.15 mid 161.25 439.25 200.15 478.15 high 447.25 863.25 486.15 902.15 rf input oscillator band min. max. min. max. low 93 167 150 224 mid 173 467 230 524 high 473 767 530 824
data sheet 13 revision 3.1, 2006-12-19 tua 6045-2 taifun 3 functional description tua 6045-2 vqfn-48 package p2, vrf p1 sawin sawin rfagc buffer sda scl cas/en busmode x_tal in p0 rfagc 36 35 34 33 32 31 30 29 28 27 26 25 ifin ifin ifampagc ifout ifout vt cp vdd dc/dc_gnd dc/dc clock x_tal buff x_tal out 14 15 16 17 18 19 20 21 22 23 24 13 osclowout oscgnd oscmidin oscmidout oschighin oschighout oschighout oschighin vcc sawout sawout gnd 1 2 3 4 5 6 7 8 9 10 11 12 highin midin osclowin highin rfgnd n.c. n.c. n.c. mixout mixout midin lowin 48 47 46 45 44 43 42 41 40 39 38 37 49 gnd package 3 functional description 3.1 pin configuration figure 1 pin configuration tua 6045-2 in vqfn-48 package
data sheet 14 revision 3.1, 2006-12-19 tua 6045-2 taifun 3 functional description 3.2 pin definition and functions  pin definition and functions pin no. symbol equivalent i/o schematic average dc voltage at v cc = 3.3v low mid high 48 osclowin 2.3 v 1 osclowout 1.8 v 2 oscgnd oscillator ground 0.0 v 0.0 v 0.0 v 3 oscmidin 2.3 v 4oscmidout 1.8 v 48 1 3 4
data sheet 15 revision 3.1, 2006-12-19 tua 6045-2 taifun 3 functional description 5 oschighin 2.3 v 6 oschigout 2.25 v 7 oschigout 2.25 v 8 oschighin 2.3 v 9 vcc supply voltage 3.3 v 3.3 v 3.3 v 10 sawout 1.65 v 1.65 v 1.65 v 11 sawout 1.65 v 1.65 v 1.65 v 12 gnd 0.0 v 0.0 v 0.0 v 13 ifin 2.64 v 2.64 v 2.64 v 14 ifin 2.64 v 2.64 v 2.64 v pin no. symbol equivalent i/o schematic average dc voltage at v cc = 3.3v low mid high 5 7 8 6 10, 11 13 14
data sheet 16 revision 3.1, 2006-12-19 tua 6045-2 taifun 3 functional description 15 ifampagc n.a. n.a. n.a. 16 ifout 1.6 v 1.6 v 1.6 v 17 ifout 1.6 v 1.6 v 1.6 v 18 vt vt vt vt 19 cp 1.7 v 1.7 v 1.7 v 20 vdd supply voltage 3.3 v 3.3 v 3.3 v 21 dc/dc_gnd 0.0 v 0.0 v 0.0 v 22 dc/dc clock n.a. n.a. n.a. pin no. symbol equivalent i/o schematic average dc voltage at v cc = 3.3v low mid high 15 17 16 18 19 22 21
data sheet 17 revision 3.1, 2006-12-19 tua 6045-2 taifun 3 functional description 23 xtal buffer 24 xtal out 0.9 v 0.9 v 0.9 v 25 xtal in 0.9 v 0.9 v 0.9 v 26 busmode n.a. n.a. n.a. 27 cas/en n.a. n.a. n.a. pin no. symbol equivalent i/o schematic average dc voltage at v cc = 3.3v low mid high 23 25 24 26 27 v ref
data sheet 18 revision 3.1, 2006-12-19 tua 6045-2 taifun 3 functional description 28 scl n.a. n.a. n.a. 29 sda n.a. n.a. n.a. 30 rfagc buffer 3.2 v 3.2 v 3.2 v 31 rfagc 3.2 v 3.2 v 3.2 v 32 p0 0 v or v cc - v ce 0 v or v cc - v ce 0 v or v cc - v ce 33 p1 0 v or v cc - v ce 0 v or v cc - v ce 0 v or v cc - v ce pin no. symbol equivalent i/o schematic average dc voltage at v cc = 3.3v low mid high 28 29 31 30 + - disable 32, 33
data sheet 19 revision 3.1, 2006-12-19 tua 6045-2 taifun 3 functional description 34 p2, vrf vrf vrf vrf 35 sawin v cc v cc v cc 36 sawin v cc v cc v cc 37 mixout v cc v cc v cc 38 mixout v cc v cc v cc 39 n. c. 40 n. c. 41 n. c. 42 rfgnd if ground 0.0 v 0.0 v 0.0 v pin no. symbol equivalent i/o schematic average dc voltage at v cc = 3.3v low mid high 34 35 36 oscillator 38 37
data sheet 20 revision 3.1, 2006-12-19 tua 6045-2 taifun 3 functional description 43 lowin 2 44 midin 1 45 midin 1 46 highin 1 47 highin 1 49 gnd package exposed pad ground (die pad) 0.0 v 0.0 v 0.0 v pin no. symbol equivalent i/o schematic average dc voltage at v cc = 3.3v low mid high 43 44 45 46 47
data sheet 21 revision 3.1, 2006-12-19 tua 6045-2 taifun 3 functional description 3.3 functional block diagram figure 2 block diagram tua 6045-2 in vqfn-48 package i f i n i f i n i f o u t h i g h i n m i d i n o s c h i g h o u t s a w o u t l o w i n v t h i g h i n i f a m p a g c oscgnd r f g n d mixout n . c . n . c . mixer mid oscillator mid oscillator high rf input mid saw filter driver agc detector i 2 c bus prog. divider crystal oscillator reference divider ports lock detector agc f div f ref fl phase/ freq comp rf input high charge pump o s c m i d i n o s c m i d o u t o s c h i g h i n o s c h i g h o u t o s c h i g h i n v c c g n d s a w o u t cp mixer high 47 46 45 44 43 42 41 48 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 30 25 27 26 28 29 31 32 33 34 35 36 d c / d c c l o c k i f o u t m i d i n s a w i n p 0 p 1 r f a g c s d a c a s / e n x_tal buff s c l p 2 , v r f 21 22 23 24 x _ t a l o u t d c / d c _ g n d 40 39 38 37 sawin dc / dc signal if agc amplifier 1 / n divider r f a g c b u f f e r osclowin osclowout n . c . busmode oscillator low rf input low mixer low mixout x _ t a l i n v cc r v d d v dd tua 6045-2
data sheet 22 revision 3.1, 2006-12-19 tua 6045-2 taifun 3 functional description 3.4 circuit description 3.4.1 mixer-oscillator-block, saw filter driver the mixer-oscillator block includes three balanced mixers (one mixer with an unbalanced high-impedance input and two mixers with a balanced low-impedance input), two 2-pin asymmetrical oscillators for the low and the mid band, one 4-pin symmetrical oscillator for the high band, a reference voltage, and a band switch. filters between tuner input and ic separate the tv frequency signals into three bands. the band switching in the tuner front-end is done by using three pnp port outputs. in the selected band, the signal passes through a tuner input stage with a mosfet amplifier, a double-tuned bandpass filter and is finally fed to the mixer input of the ic. the impedance of the mixer at low band has high ohmic, while mid or high band has a low ohmic input. the input signal is mixed there with the signal from the activated on chip oscillator to the if frequency. the if is filtered by means of an external saw filter (surface acoustic waves filter) in between the 2 mixer output pins and the 2 input pins of the following saw filter driver. the saw filter driver has a low output impedance to drive the saw filter directly. 3.4.2 rf agc the rf agc stage combines a wide band and a narrow band detection. the wide band detector (wb) detects the input signal directly at the rf input for each band. the narrow band detector (nb) detects the level of the saw filter driver output signal. if both detected levels are below the rf agc take-over points, a external capacity will be charged with the source current of 300 na or 9 a (release current). if one of the detected levels is above the rf agc take-over points, the external capacity will be discharged with the sink current of 100 a (attack current). the integrated current generates an agc voltage for gain control of the tuners input transistors. the agc take- over and the time constant are selectable by the i 2 c bus as shown in table 17 "subaddress 03h, agc control and if signal processing control" on page 52 . an integrated rf agc buffer allows to monitor the agc voltage without any influence on the tuner gain control. this buffer can be disabled as shown in table 16 "subaddress 02h, reference divider r and crystal oscillator control" on page 50 3.4.3 if agc amplifier coming out of the saw filter the if signal is sent through a vga (variable gain amplifier) which will set the differential if output signal to the desired level (preferably 1 vpp). the gain of the vga is determined by the dc-voltage at pin ifampagc
data sheet 23 revision 3.1, 2006-12-19 tua 6045-2 taifun 3 functional description 3.4.4 pll block, xtal oscillator the vco frequency f osc is stabilized by a digital cmos pll (phase locked loop, frequency synthesizer). the oscillator signal is internally dc-coupled as a differential signal to the programmable divider input. the signal subsequently passes through a programmable divider (n) and then the divided vco signal: is compared in a digital frequency/phase detector (pd, frequency detector) with a programmable reference frequency: which is derived from a quartz reference f xtal divided by a programmable reference divider (r). the phase detector has a linear operating range without a dead zone for very small phase deviations. a programmable abl pulse width (anti backlash) works against the delay of the charge pump cell. the selectable abl pulse width values have been implemented for test purpose only and have no performance effects. the phase detector has two outputs (up & down) that drive two current sources of opposite polarity as charge pump (cp). if the negative edge of the divided vco signal appears prior to the negative edge of the reference signal, the positive current source (i source ) pulses for the duration of the phase difference. in the reverse case the negative current source (i sink ) pulses. if the two signals are in phase (pll is locked), the integrated charge pump current is approximately zero. in case of active closed loop control the charge pump provides programmable output current drive capability to optimize the loop requirements. the charge pump currents are programmable from 0 to 1.125 ma in steps of 75 a. the pll contains an integrated lock detector. a lock-in flag is set when the loop is locked. it can be read by the processor via the common i 2 c/3-wire bus. the crystal oscillator (xtal) is an unbalanced pierce oscillator which operates in parallel resonance with quartz crystals from 4...16 mhz. by programming it?s possible to pass the oscillator frequency f xtal through a divider stage to a buffered output pin or to use an external quartz clock for the reference oscillator via a switchable preamplifier for test purpose only. 3.4.5 bus interface the programming of the cmos frequency synthesizer is done via a combined serial i 2 c/3-wire bus interface. the choice of the desired bus is made by a bus mode select signal at pin busmode. f div f osc n ----------- - n240 65535 = () , = f ref f xtal r --------------- r2 1023 = () , =
data sheet 24 revision 3.1, 2006-12-19 tua 6045-2 taifun 3 functional description in i 2 c-bus mode four different chip addresses can be set by appropriate dc levels at pin cas (chip address select), while in 3-wire mode the chip is addressed by a low active enable signal at pin en. the content of the bus telegram (serial data format) is controlled by software programming and assigned to the registers of the functional units according to the several sub addresses. the most significant bit (msb) of the data protocol is shifted in first. the clock is generated by the processor (input pin scl/clock), while pin sda/data functions as an input or an output (open drain, external pull-up resistor) depending on the direction of the data (write or read mode). both inputs have schmitt-trigger circuits with hysteresis and furthermore a low-pass characteristic, which suppress a certain noise level on the bus lines and enhance so the noise immunity of the combi-bus. a detailed description of the chip address organization in i 2 c-mode as well as the used sub addresses of the data registers is given in chapter 5.2 "bus interface" on page 41 - and the programmable i 2 c/3-wire bus data format is shown in chapter 5.3 "bus data format" on page 43 . 3.4.6 dc/dc clock output to drive a bipolar npn switching transistor of an external dc/dc converter directly, a programmable dc/dc clock generator is integrated. the clock frequency and the duty cycle of the dc/dc clock generator can be set over the i 2 c/3-wire bus as shown in table 18 "subaddress 04h, dc-dc converter" on page 54 . 3.4.7 power-on reset, stand-by condition while applying the supply voltage, integrated power-on reset circuits ensure a defined state after initial power-up. the required programming data will be set to default values. when v cc fall below approximately 1.2 v (typ.) the power-on resets go active and tie all write data registers to their power-on defaults (= power-down reset). while power-on reset is active no programming is possible. the power-on flags (pofx) are set at power-on and when v vccx falls below appr. 1.2 v (typ.). they will be reset at the end of a read operation of the status register. by programmable stand-by control bits it?s possible to reduce the current consumption of the ic up to 99%. in the full stand-by mode only bus interface is staying active and the current consumption is reduced below 200 a. after power-on reset only bus interface and xtal-oscillator with bandgap are active and the current consumption is about 2.6 ma (typ.).
data sheet 25 revision 3.1, 2006-12-19 tua 6045-2 taifun 3 functional description 3.4.8 if switch, loop thru for the alignment procedure of the tuner module two programmable switches are integrated to bypass the bandpass, the saw driver and the saw filter. the first switch called ?if switch? can switch between the mixer output signal and the bandpass output signal. the second switch called ?loop thru? can switch between the signal after the first stage of the if agc amplifier and the saw filter output signal. figure 3 functional block diagram of if switch and loop thru band- pass mixer if switch sawdrv mixer input if output saw filter if agc amplifier loop thru if switch control = bit 15 of sub address 03h loop thru control = bit 14 of sub address 03h
data sheet 26 revision 3.1, 2006-12-19 tua 6045-2 taifun 3 applications 4 applications 4.1 tuner application block diagram figure 4 tuner application block diagram mid band low band  
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data sheet 27 revision 3.1, 2006-12-19 tua 6045-2 taifun 3 applications 4.2 application circuit for hybrid application figure 5 circuit diagram for hybrid application (dvb-t / pal) gnd d1 bb659c c2 2p2 l1 8,5 turns c1 2p7 c10 100p gnd gnd d2 bb659c c3 1p5 l2 2,5 turns c4 1p2 c11 82p gnd c5 1p2 c6 1p2 c7 1p2 c8 1p2 l3 2 turns c12 22p d3 bb555 gnd gnd c56 22p c54 22p c55 2p2 c53 1n c52 1n gnd gnd gnd gnd c51 1n gnd c9 100n gnd vcc c23 6n8 c24 33p c15 22n gnd c33 39p c32 39p c38 100p gnd c39 100p gnd c19 10n x5 mid x6 hich x4 low gnd gnd gnd gnd x1 sma c21 1n c20 1n gnd2 v1 bc847 gnd2 d4 bas 70-02w c26 100n c30 100n gnd2 gnd2 vcc c31 1n x2 sma gnd c35 4n7 gnd gnd c28 100n r13 100k r14 10k r8 150k r17 0r vcc gnd r1 12r r2 2k7 r3 2k7 r4 8r2 r5 2k2 r6 2k2 r22 220r r23 220r c44 4n7 p2,vrf gnd c43 4n7 p1 gnd c40 4n7 rf agc buffer gnd c42 4n7 p0 gnd c41 100n gnd /ifout 1 nc. 2 ifout 3 gnd 7 if 6 gnd 5 gnd 4 tr1 toko(a1010)-transformer r21 100r c36 47p gnd c37 47p gnd ifampagc gnd gnd c22 12p c14 3n3 r9 2k2 r16 33k 4 6 3 2 1 tr2 macom 1:1(etc1-1-13) 4 6 3 2 1 tr3 macom 1:1(etc1-1-13) l5 1u2h l7 1mh np r19 sda scl cas/en gnd pll x3 sma c34 np r20 0r j1 jumper 1x2 gnd c27 22n gnd2 sda scl cas/en busmode l4 68nh c13 100n gnd c16 np vt l6 68nh c29 100n gnd d5 z33 gnd2 j3 stocko 4pol r27 50r gnd gnd gnd l8 220nh x6966d r10 0r r11 0r 4mhz q1 r15 10k c25 100n gnd r12 10k c47 5p6 c48 np c49 np l9 np r26 np gnd gnd l11 390nh l10 390nh c50 100n gnd vcc np r18 r7 0r c18 2p7 c17 2p7 gnd gnd out 5 in 1 in 2 gnd 3 out 4 saw1 sip5d r24 0r r25 0r c46 22p gnd c45 22p gnd c57 270p gnd 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 osclowout oscgnd oscmidin oscmidout oschighin /oschighout oschighout /oschighin vcc sawout /sawout gnd ifin ifin ifampagc /ifout ifout vt cp vdd gnd dc/dc clock x_tal buff x_tal out sawin /sawin p2,vrf p1 po rf agc rf agc buffer sda scl cas/en busmode x_tal in mixout /mixout n.c n.c n.c rfgnd lowin /midin midin /highin highin osclowin ic1 TUA6045-2 (vqfn48)
data sheet 28 revision 3.1, 2006-12-19 tua 6045-2 taifun 3 applications 4.3 application circuit for l-band application figure 6 circuit diagram for l-band application gnd d1 bb659c c2 2p2 l1 8,5 turns c1 2p7 c10 100p gnd gnd d2 bb659c c3 1p5 l2 2,5 turns c4 1p2 c11 82p gnd c5 1p2 c6 1p2 c7 1p2 c8 1p2 l3 2 turns (small) c12 1p8 d3 bb555 gnd gnd c56 22p c54 22p c55 2p2 c53 1n c52 1n gnd gnd gnd gnd c51 1n gnd c9 100n gnd vcc c23 6n8 c24 33p c15 22n gnd c33 39p c32 39p c38 100p gnd c39 100p gnd c19 10n x5 mid x6 hich x4 low gnd gnd gnd gnd x1 sma c21 1n c20 1n gnd2 v1 bc847 gnd2 d4 bas 70-02w c26 100n c30 100n gnd2 gnd2 vcc c31 1n x2 sma gnd c35 4n7 gnd gnd c28 100n r13 100k r14 10k r8 1m r17 0r vcc gnd r1 12r r2 2k7 r3 2k7 r4 8r2 r5 2k2 r6 2k2 r22 220r r23 220r c44 4n7 p2,vrf gnd c43 4n7 p1 gnd c40 4n7 rf agc buffer gnd c42 4n7 p0 gnd c41 100n gnd /ifout 1 nc. 2 ifout 3 gnd 7 if 6 gnd 5 gnd 4 tr1 toko(a1010)-transformer r21 100r c36 47p gnd c37 47p gnd ifampagc gnd gnd c22 12p c14 3n3 r9 2k2 r16 33k 4 6 3 2 1 tr2 macom 1:1(etc1-1-13) 4 6 3 2 1 tr3 pulse 1:1(cx2156) l5 1u2h l7 1mh np r19 sda scl cas/en gnd pll x3 sma c34 np r20 0r j1 jumper 1x2 gnd c27 22n gnd2 sda scl cas/en busmode l4 68nh c13 100n gnd c16 np vt l6 68nh c29 100n gnd d5 z33 gnd2 j3 stocko 4pol r27 50r gnd gnd gnd l8 220nh x6966d r10 0r r11 0r 4mhz q1 r15 10k c25 100n gnd r12 10k c47 5p6 c48 np c49 np l9 np r26 np gnd gnd l11 390nh l10 390nh c50 100n gnd vcc np r18 r7 0r c18 2p7 c17 2p7 gnd gnd out 5 in 1 in 2 gnd 3 out 4 saw1 sip5d r24 0r r25 0r c46 22p gnd c45 22p gnd c57 270p gnd 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 osclowout oscgnd oscmidin oscmidout oschighin /oschighout oschighout /oschighin vcc sawout /sawout gnd ifin ifin ifampagc /ifout ifout vt cp vdd gnd dc/dc clock x_tal buff x_tal out sawin /sawin p2,vrf p1 po rf agc rf agc buffer sda scl cas/en busmode x_tal in mixout /mixout n.c n.c n.c rfgnd lowin /midin midin /highin highin osclowin ic1 TUA6045-2 (vqfn48)
data sheet 29 revision 3.1, 2006-12-19 tua 6045-2 taifun 3 reference 5 reference 5.1 electrical data 5.1.1 absolute maximum ratings attention: the maximum ratings may not be exceeded under any circumstances, not even momentarily and individually, as permanent damage to the ic will result. table 4 absolute maximum ratings # parameter symbol limit values unit remarks min. max. 1. supply voltage v cc -0.3 5.5 v 2. ambient temperature t a -40 +85 c exposed gnd pad soldered 3. junction temperature t j -40 +125 c 4. storage temperature t stg -40 +125 c 5. thermal resistance junction to ambient r thja 39 k/w exposed gnd pad soldered pll 6. cp v cp -0.3 3 v 7. i cp 1ma 8. bus input/output sda v sda -0.3 5.5 v 9. bus output current sda i sda(l) 10 ma open drain 10. bus input scl v scl -0.3 5.5 v 11. chip address switch as v as -0.3 5.5 v 12. vco tuning output (loop filter) v vt -0.3 35 v 13. pmos port output current of p0, p1 i p(l) -10 0 ma open drain 14. pmos port output current of p2,vrf i p(l) -2 -10 2 0 ma ma analog voltage digital switch 15. total port output current of pmos ports i p(l) -20 0 ma t max = 0.1 s at 5.5 v 16. dc/dc output current i dc/dc 20 ma
data sheet 30 revision 3.1, 2006-12-19 tua 6045-2 taifun 3 reference 5.1.2 operating range table 5 operating range mixer-oscillator 17. mix inputs low band v low -0.3 3 v 18. mix inputs mid/high band v mid/high 2v 19. i mid/high -5 6 ma 20. vco base voltage v b -0.3 3 v low, mid and high band oscillators 21. vco collector voltage v c 5.5 v low, mid and high band oscillators 22. voltage on all other inputs, outputs, except gnds v max -0.3 v cc v esd-protection 23. all pins v esd 2kv # parameter symbol limit values unit remarks min. max. 1. supply voltage v cc +3.0 +5.5 v nominal 3.3 v 2. ambient temperature t a -20 +85 c exposed gnd pad soldered 3. programmable divider factor n 240 65535 4. low mixer input frequency range f mixl 30 200 mhz 5. mid band mixer input frequency range f mixm 130 500 mhz # parameter symbol limit values unit remarks min. max.
data sheet 31 revision 3.1, 2006-12-19 tua 6045-2 taifun 3 reference 5.1.3 ac/dc characteristics table 6 ac/dc characteristics, t a = 25c, v cc = 3.3v 6. high band mixer input frequency range f mixh 350 1500 mhz 7. low oscillator frequency range f ol 65 250 mhz 8. mid band oscillator frequency range f om 165 530 mhz 9. high band oscillator frequency range f oh 400 1550 mhz # parameter 1) symbol limit values unit test conditions min. typ. max. supply 10. current consumption in active mode i vcc 39 ma vga v1,v0=11, saw s1,s0=11 11. 47 ma vga v1,v0=10, saw s1,s0=10 12. 54 ma vga v1,v0=01, saw s1,s0=01 13. 64 ma vga v1,v0=00, saw s1,s0=00 14. i mix 7 ma mixer current 15. i vdd 8 ma digital part 16. current consumption in stand-by mode i stby 2.6 ma bias, bus-interface and crystal oscillator active 17. 170 a full standby iic mode 18. 7 a full standby 3-wire mode # parameter symbol limit values unit remarks min. max.
data sheet 32 revision 3.1, 2006-12-19 tua 6045-2 taifun 3 reference digital part pll crystal oscillator connections xtal 19. crystal frequency f xtal 3.2 4.0 16 mhz 20. crystal resistance r xtal 270 ? 4 mhz, 2x39pf 21. 90 ? 16 mhz, 2x18pf 22. crystal oscillator transconductance g m,xtal -850 -600 a/v v out = 0.9v v in = 0.8 to 1.0v 23. oscillator impedance y xtalosc -150 a/v 4 mhz, 2x39pf 24. -200 a/v 16 mhz, 2x18pf 25. buffer output frequency f xtalio 0.4 16 mhz divider ratios 1, 2, 4, 8 26. xtal buffer output low voltage v low 050100mv 27. buffer signal voltage v ac 200 mv pp xtal3,xtal2=0,1 28. 400 mv pp xtal3,xtal2=1,0 29. 800 mv pp xtal3,xtal2=1,1 30. external input signal voltage v acin 13 v pp amp off 31. 50 200 mv pp amp on tuning voltage output vt (open collector) 32. output voltage when the loop is closed, (test mode in normal operation) v tl 0.4 32.7 v ports 33. standard ports (pmos) i max -10 ma 34. output saturation voltage v max 0.25 0.4 v 35. voltage refered port i max -2 ma # parameter 1) symbol limit values unit test conditions min. typ. max.
data sheet 33 revision 3.1, 2006-12-19 tua 6045-2 taifun 3 reference 36. voltage refered port v 0 v 1 ... v 26 v 27 0 0.1 2.6 2.7 v v v v dc/dc clock generator 37. programmable high t high 1 127 multiple of crystal oscillator period 38. programmable low t low 1 127 multiple of crystal oscillator period 39. output high current i high 250 a functional range 0-2v 40. output low impedance r low 10 ? analog part without if agc low band mixer and saw driver at power level s1,s0=10 41. rf frequency f rf 44.25 170.25 mhz picture carrier 2) 42. voltage gain g v 21 24 27 db f rf = 48.25 mhz to 154.25 mhz see 5.6.1 on page 59 43. noise figure nf 8 10 db f rf = 48.25 mhz to 154.25 mhz see 5.6.4 on page 60 44. sawout output voltage causing 0.8% of crossmodulation in channel v o 111 dbv f rf = 48.25 mhz to 154.25 mhz see 5.6.6 on page 61 45. input ip3 iip3 120 dbv f rf1 = 48.25 mhz, f rf2 = 49.25 mhz, p rf1 = p rf2 46. 120 dbv f rf1 = 154.25 mhz, f rf2 = 155.25 mhz, p rf1 = p rf2 # parameter 1) symbol limit values unit test conditions min. typ. max.
data sheet 34 revision 3.1, 2006-12-19 tua 6045-2 taifun 3 reference 47. output voltage causing 1 db compression v o 125 dbv f rf = 48.25 mhz to 154.25 mhz 48. local oscillator fm caused by i 2 c communication fm i2c 2.12 khz f rf = 154.25 mhz 3) 49. (n+5) - 1 mhz pulling n+5 - 1 mhz 77 80 dbv f rfw = 69.25 mhz, f osc = 108.15 mhz, f rfu = 108.25 mhz 4) 50. input impedance z i = (r p || 1/j c p ) r p 1k ? parallel equivalent circuit at 100 mhz 5) 51. c p 2pf mid band mixer and saw driver at power level s1,s0=10 52. rf frequency f rf 154.25 454.25 mhz picture carrier 2) 53. voltage gain g v 31 34 37 db f rf = 161.25 mhz to 439.25 mhz see 5.6.2 on page 59 54. noise figure (not corrected for image) nf 6 8 db f rf = 161.25 mhz to 439.25 mhz see 5.6.5 on page 61 55. sawout output voltage causing 0.8% of crossmodulation in channel v o 110 dbv f rf = 161.25 mhz to 439.25 mhz see 5.6.7 on page 62 56. input ip3 iip3 110 dbv f rf1 = 161.25 mhz, f rf2 = 162.25 mhz, p rf1 = p rf2 57. 108 dbv f rf1 = 439.25 mhz, f rf2 = 440.25 mhz, p rf1 = p rf2 58. output voltage causing 1 db compression v o 125 dbv f rf = 161.25 mhz to 439.25 mhz 59. local oscillator fm caused by i 2 c communication fm i2c 2.12 khz f rf = 439.25 mhz 3) # parameter 1) symbol limit values unit test conditions min. typ. max.
data sheet 35 revision 3.1, 2006-12-19 tua 6045-2 taifun 3 reference 60. (n+5) - 1 mhz pulling n+5 - 1 mhz 77 80 dbv f rfw = 359.25 mhz, f osc = 398.15 mhz, f rfu = 398.25 mhz 4) 61. input impedance z i = (r s + j l s ) r s 35 ? f rf = 161.25 mhz to 439.25 mhz 5) 62. l s 8nh high band mixer and saw driver at power level s1,s0=10 63. rf frequency f rf 399.25 863.25 mhz picture carrier 2) 64. voltage gain g v 31 34 37 db f rf = 447.25 mhz to 863.25 mhz see 5.6.2 on page 59 65. noise figure (not corrected for image) nf 6 8 db f rf = 447.25 mhz to 863.25 mhz see 5.6.5 on page 61 66. sawout output voltage causing 0.8% of crossmodulation in channel v o 110 dbv f rf = 447.25 mhz to 863.25 mhz see 5.6.7 on page 62 67. input ip3 iip3 106 dbv f rf1 = 447.25 mhz, f rf2 = 448.25 mhz, p rf1 = p rf2 68. 108 dbv f rf1 = 863.25 mhz, f rf2 = 864.25 mhz, p rf1 = p rf2 69. output voltage causing 1 db compression v o 125 dbv f rf = 447.25 mhz to 863.25 mhz 70. local oscillator fm caused by i 2 c communication fm i2c 2.12 khz f rf = 863.25 mhz 3) 71. (n+5) - 1 mhz pulling n+5 - 1 mhz 77 80 dbv f rfw = 823.25 mhz, f osc = 862.15 mhz, f rfu = 862.25 mhz 4) 72. input impedance z i = (r s + j l s ) r s 35 ? f rf = 447.25 mhz to 863.25 mhz 5) 73. l s 8nh # parameter 1) symbol limit values unit test conditions min. typ. max.
data sheet 36 revision 3.1, 2006-12-19 tua 6045-2 taifun 3 reference high band mixer and saw driver in l-band application (see 4.3 on page 28) 74. rf frequency f rf 1452 1492 mhz picture carrier 2) 75. voltage gain g v 29 32 35 db f rf = 1452 mhz to 1492 mhz see 5.6.2 on page 59 76. noise figure (not corrected for image) nf 8 10 db f rf = 1452 mhz to 1492 mhz see 5.6.5 on page 61 low band oscillator 77. oscillator frequency f osc 80 210 mhz 6) 78. phase noise, carrier to noise sideband osc -84 -77 dbc/ hz 1 khz frequency offset, wide loop, worst case in the frequency range 79. -92 -88 dbc/ hz 10 khz frequency offset, narrow loop, worst case in the frequency range 80. -112 -106 dbc/ hz 100 khz frequency offset, worst case in the frequency range 81. ripple susceptibility of v cc rsc -22 dbc v ripple =20mvpp, f ripple = 1 khz 7) 82. -50 dbc v ripple =20mvpp, f ripple = 100 khz 7) mid band oscillator 83. oscillator frequency f osc 201 493 mhz 6) # parameter 1) symbol limit values unit test conditions min. typ. max.
data sheet 37 revision 3.1, 2006-12-19 tua 6045-2 taifun 3 reference 84. phase noise, carrier to noise sideband osc -82 -75 dbc/ hz 1 khz frequency offset, wide loop, worst case in the frequency range 85. -92 -88 dbc/ hz 10 khz frequency offset, narrow loop, worst case in the frequency range 86. -112 -106 dbc/ hz 100 khz frequency offset, worst case in the frequency range 87. ripple susceptibility of v cc rsc -25 dbc v ripple =20mvpp, f ripple = 1 khz 7) 88. -55 dbc v ripple =20mvpp, f ripple = 100 khz 7) high band oscillator 89. oscillator frequency f osc 435 905 mhz 6) 90. phase noise, carrier to noise sideband osc -80 -73 dbc/ hz 1 khz frequency offset, wide loop, worst case in the frequency range 91. -90 -86 dbc/ hz 10 khz frequency offset, narrow loop, worst case in the frequency range 92. -110 -106 dbc/ hz 100 khz frequency offset, worst case in the frequency range 93. ripple susceptibility of v cc rsc -30 dbc v ripple =20mvpp, f ripple = 1 khz 7) 94. -55 dbc v ripple =20mvpp, f ripple = 100 khz 7) high band oscillator in l-band application (see 4.3 on page 28) # parameter 1) symbol limit values unit test conditions min. typ. max.
data sheet 38 revision 3.1, 2006-12-19 tua 6045-2 taifun 3 reference 95. oscillator frequency f osc 1488 1528 mhz 6) 96. phase noise, carrier to noise sideband -85 -80 dbc/ hz 10 khz frequency offset, narrow loop, f rf = 1452 mhz to 1492 mhz saw driver 97. voltage gain g v 20 db f if = 36 mhz to 54 mhz 98. input impedance z i = (r p || 1/j c p ) r p 450 ? parallel equivalent circuit at 36 mhz 5) 99. c p 5pf 100. output impedance z o = (r s + j l s ) r s 65 ? series equivalent circuit at 36 mhz 5) 101. l s 20 nh rejection at the saw driver output 102. level of divider interferences in the if signal int div -66 -60 dbc v out = 100 dbv 8) 103. crystal oscillator interferences rejection int xtal -66 -60 dbc v out = 100 dbv 9) 104. reference frequency rejection int ref -66 -60 dbc v out = 100 dbv 10) 105. channel s02 beat int s02 -60 -57 dbc f rfpix = 76.25 mhz, v rfpix = 80 dbv 11) rf agc output 106. rf agc take-over point wide band (rf input) agc top wide 87 77 99 89 dbv low band mid, high band 107. rf agc take-over point narrow band (sawout) agc top narrow 103 115 dbv 108. source current 1 i agc fast 9.0 a 109. source current 2 i agc slow 300 na 110. peak sink to ground i agc peak 100 a # parameter 1) symbol limit values unit test conditions min. typ. max.
data sheet 39 revision 3.1, 2006-12-19 tua 6045-2 taifun 3 reference 111. rf agc leakage current agc leak -50 50 na 0 < v agc < v cc 112. rf agc output voltage v agcmax v cc - 0.25 v cc v maximum level 113. v agcmin 0 0.25 v minimum level 114. rf voltage range to switch the agc from active to inactive mode agc slip 0.5 db rf agc buffer output 115. rf agc buffer output current i max 2ma 116. saturation voltage low v sat_low 100 mv i load = 1ma 117. 200 mv i load = 2ma 118. saturation voltage high v sat_high 100 mv i load = 1ma 119. 200 mv i load = 2ma 120. rf agc buffer output voltage agc off 0 v power down if amplifier 121. voltage gain g max 65 db v ifagc 2.5 v 122. g min 9 db v ifagc 0.2 v 123. maximum if input level v if/if 102 dbv min. gain, f if/if = 36 mhz (sine), v ifagc = 0.2 v, v out/out = 1 v pp 124. minimum if input level v if/if 46 max. gain, f if/if = 36 mhz (sine), v ifagc = 2.5 v, v out/out = 1 v pp 125. input impedance r if/if 2 k ? f if/if = 36 mhz, parallel equivalent circuit 5) 126. c if/if 1.5 pf # parameter 1) symbol limit values unit test conditions min. typ. max.
data sheet 40 revision 3.1, 2006-12-19 tua 6045-2 taifun 3 reference 127. low end cutoff frequency (-1 db) f l 25 mhz v if/if = 60 dbv , r load 5 k ? , c load 1.5 pf, v out/out = 1 v pp at f if/if = 36 mhz (sine) 128. high end cutoff frequency (-1 db) f h 65 mhz 129. intermodulation v1,v0 = 00 (5.0ma) v1,v0 = 01 (3.6ma) v1,v0 = 10 (2.1ma) c/im3 c/im3 c/im3 -59 -58 -56 -50 -50 -50 dbc dbc dbc f if/if 1 = 37 mhz, f if/if 2 = 38 mhz, v if/if 1 = 90 dbv , v if/if 2 = 90 dbv r load =1 k ? , c load = 10 pf, v out/out = 1 v pp 130. intermodulation v1,v0 = 11 (1.1ma) c/im3 -56 -50 dbc f if/if 1 = 37 mhz, f if/if 2 = 38 mhz, v if/if 1 = 90 dbv , v if/if 2 = 90 dbv r load 1 5 k ? , c load = 1.5pf, v out/out = 1 v pp 131. third order output intercept point v1,v0 = 00 (5.0ma) oip3 133 dbv f if/if 1 = 37 mhz, f if/if 2 = 38 mhz, v if/if 1 = 90 dbv , v if/if 2 = 90 dbv r load = 1 k ? , c load = 10 pf, v out/out = 1 v pp 132. signal to noise ratio snr 43 db f if/if = 36 mhz (sine), v if/if = 60 dbv, v out/out = 1 v pp, bw = 8 mhz 133. noise figure 10 db max. gain 134. output impedance r if/if 90 150 ? f out/out = 36 mhz, series equivalent circuit 5) 135. l if/if 120 nh # parameter 1) symbol limit values unit test conditions min. typ. max.
data sheet 41 revision 3.1, 2006-12-19 tua 6045-2 taifun 3 reference 5.2 bus interface table 7 pin function 1) values are referred to figure 4.2 "application circuit for hybrid application" on page 27 and f if =36mhz, unless stated otherwise. 2) the rf frequency range is defined by the oscillator frequency range and the intermediate frequency (if). 3) local oscillator fm modulation resulting from i 2 c communication is measured at the if output using a modulation analyzer with a peak to peak detector ((p + + p - ) / 2) and a post detection filter 20 hz - 100 khz. the i 2 c messages are sent to the tuner in such a way that the tuner is addressed but the content of the pll registers are not altered. the refresh interval between each data set shall be 20 ms to 1 s. 4) (n+5) -1 mhz is defined as the input level of channel n+5, at frequency 1 mhz lower, causing 100 khz fm sidebands 30 db below the wanted carrier. 5) impedance measured with differential 2-port measurement at input or output. input and output pins directly connected to measurement equipment with 50 ? strip lines. 6) limits are related to the tank circuit used in the application board. frequency bands may be adjusted by the choice of external components. 7) the supply ripple susceptibility is a sideband measurement using a spectrum analyzer connected to the if output. an unmodulated rf signal with a level of 80 dbv is applied to the test board rf input. a sinewave signal with a defined frequency is superposed onto the supply voltage (see figure 16 "ripple susceptibility measurement" on page 62 ). the specified value is the worst case in the frequency range. 8) this is the level of divider interferences close to the if frequency. for example channel s3: f osc = 158.15 mhz, 1/4 f osc = 39.5375 mhz. the rejection has to be greater than 60 db for an saw driver output of 100 dbv. 9) crystal oscillator interference means the 4 mhz sidebands caused by the crystal oscillator. the rejection has to be greater than 60 db for an saw driver output of 100 dbv. 10) the reference frequency rejection is the level of reference frequency sidebands (e.g. 62.5 khz) related to the carrier. the rejection has to be greater than 60 db for an saw driver output of 100dbv. 11) channel s02 beat is the interfering product of f rfpix , f if and f osc of channel s02, f beat = 37.35 mhz. the possible mechanisms are f osc - 2 x f if or 2 x f rfpix - f osc . pin designation busmode sda / data scl / clock cas / en function bus mode select serial data clock i 2 c: chip address select, 3-w: enable i 2 c mode 0 data in/out clock in four chip addresses 1) 1) see table 8 chip address organization in i2c mode on page 42 , see table 9 address selection in i2c mode on page 42 3-wire mode 1 or open 0: chip is addressed
data sheet 42 revision 3.1, 2006-12-19 tua 6045-2 taifun 3 reference table 8 chip address organization in i 2 c mode table 9 address selection in i 2 c mode table 10 sub addresses of write data registers name byte msb bit6 bit5 bit4 bit3 bit2 bit1 lsb write mode address byte adb 1 1 0 0 0 ma1 ma0 r/w=0 read mode address byte adb 1 1 0 0 0 ma1 ma0 r/w=1 chip address (hex) voltage at pin cas/en ma1 ma0 write mode read mode (0 to 0.1) x v vccd 0 0 c0 c1 open circuit or (0.2 to 0.3) x v vccd 0 1 c2 c3 (0.4 to 0.6) x v vccd 1 0 c4 c5 (0.9 to 1) x v vccd 1 1 c6 c7 function hex msb s6 s5 s4 s3 s2 s1 lsb main divider (n) 0000000000 control bytes 0100000001 ref. divider (r) 0200000010 agc control, if signal processing control 0300000011 dc-dc converter 0400000100 not used 0500000101 mode bytes, stand by, test 0600000110
data sheet 43 revision 3.1, 2006-12-19 tua 6045-2 taifun 3 reference table 11 sub addresses of read data registers 5.3 bus data format table 12 bus data format function hex msb s6 s5 s4 s3 s2 s1 lsb status 8010000000 chip code 8e10001110 revision code 8f10001111 i 2 c-bus write mode i 2 c-bus read mode 3w-bus write mode 3w-bus read mode bit function bit function bit function bit function sta sta 1 msb 1 msb 1 chip address (write) 1 chip address (write) 00 00 00 ma0 ma0 ma1 ma1 0 lsb 0 lsb ack ack s7 msb s7 msb s7 msb s7 msb s6 sub address (write) 00h...06h s6 sub address (read) 80h, 8eh, 8fh s6 sub address (write) 00h...06h s6 sub address (read) 80h 8eh, 8fh s5 s5 s5 s5 s4 s4 s4 s4 s3 s3 s3 s3 s2 s2 s2 s2 s1 s1 s1 s1 s0 lsb s0 lsb s0 lsb s0 lsb
data sheet 44 revision 3.1, 2006-12-19 tua 6045-2 taifun 3 reference sta: start condition, sto: stop condition, ack: acknowledge from tua 6045. ack ack sta restart dx msb 1 msb dx msb dx msb ... data in x...0 (x=7,15 or 23) 1) 1 chip address (read) ... data in x...0 (x=7,15 or 23) ... data out x...0 (x=7 or 15) d5 0 d5 d5 d4 0 d4 d4 d3 0 d3 d3 d2 ma0 d2 d2 d1 ma1 d1 d1 d0 lsb 1 lsb d0 lsb d0 lsb ack ack sto dx msb 1) after each byte an acknowledge is generated by tua 6045. 2) after each byte an acknowledge is generated by the processor. tua 6045 keeps data line high. ... data out x...0 (x=7 or 15) 2) d5 d4 d3 d2 d1 d0 lsb 1 sto i 2 c-bus write mode i 2 c-bus read mode 3w-bus write mode 3w-bus read mode bit function bit function bit function bit function
data sheet 45 revision 3.1, 2006-12-19 tua 6045-2 taifun 3 reference 5.4 bus timing figure 7 i 2 c bus figure 8 3-wire bus scl sda t buf s p t hd.dat t hd.sta t high t f t low t r t su.dat t hd.sta t sp p t su.sto s t su.sta busmode = 0 s - s tart condition p - sto p condition clock data enable s t hd.dat t hd.sta t high t f t low t su.dat t sp p t su.sto t su.sclena busmode = 1 t su.sclena t when t r
data sheet 46 revision 3.1, 2006-12-19 tua 6045-2 taifun 3 reference table 13 bus timing # parameter symbol limit values unit min. max. 1. low level input voltage (sda, scl, cas/en, busmode) v il -0.5 0.54 v 2. high level input voltage (sda, scl, cas/en, busmode) v ih 1.26 5.5 v 3. hysteresis of schmitt trigger inputs v hys 0.15 v 4. pulse width of spikes which must be suppressed by the input filter t sp 050ns 5. low level output voltage (sda), only i2c-bus at 3ma sink current at 6ma sink current v ol 00.4 0.6 v v 6. output fall time from v ih min to v il max with a bus capacitance from 10pf to 400pf with up to 3ma sink current at v ol t of 20+0.1c b 1) 250 ns 7. scl clock frequency f scl 0400khz 8. bus free time between a stop and start condition 2) t buf 1.3 - s 9. hold time (repeated) start/enable on condition. after this period, the first clock pulse is generated. t hd.sta 0.6 - s 10. low period of the scl clock pulse t low 1.3 - s 11. high period of the scl clock pulse t high 0.6 - s 12. set-up time for a repeated start condition 2) t su.sta 0.6 - s 13. data hold time t hd.dat 0-ns 14. data set-up time t su.dat 100 - ns 15. rise time, fall time of sda and scl signals t r , t f 20+0.1c b 1) 300 ns 16. set-up time for stop/enable off condition t su.sto 0.6 - s
data sheet 47 revision 3.1, 2006-12-19 tua 6045-2 taifun 3 reference 17. setup time cas/en to sda 3) t su.enasd a 0.6 - s 18. setup time scl to cas/en t su.sclen a 0.6 - s 19. h-pulse width (cas/en) for new data protocol 3) t when 0.6 - s 20. capacitive load for each bus line c b -- 400 pf 1) c b = capacitance of one bus line in pf. note that the maximum t f for the sda and scl bus lines quoted in table above (300ns) is longer than the specified maximum t of for the output stages (250ns).this allows series protection resistors to be connected between the sda/scl pins and the sda/scl bus lines without exceeding the maximum specified t f . 2) only for i 2 c bus mode. 3) only for 3-wire bus mode. # parameter symbol limit values unit min. max.
data sheet 48 revision 3.1, 2006-12-19 tua 6045-2 taifun 3 reference 5.5 data byte specification, function and defaults 5.5.1 write data registers table 14 subaddress 00h, main divider bit symbol bits v function description defaults 15 n15 2 15 synthesizer n-counter programmable divider bits: n = 2 15 x n15 + ... + n0 n = 240 ... 65535 0 default divider ratio n = 7906 1) 1) default: f rf = 458mhz with f ref = 62.5khz, f if = 36.125mhz. 14 n14 2 14 0 13 n13 2 13 0 12 n12 2 12 1 11 n11 2 11 1 10 n10 2 10 1 9n9 2 9 1 8n8 2 8 0 7n7 2 7 1 6n6 2 6 1 5n5 2 5 1 4n4 2 4 0 3n3 2 3 (internal a-counter a = 0 ... 15)) 0 2n2 2 2 0 1n1 2 1 1 0n0 2 0 0
data sheet 49 revision 3.1, 2006-12-19 tua 6045-2 taifun 3 reference table 15 subaddress 01h, control bytes bit symbol bits v function description defaults 15 not used not used 0 p2_4 ... p2_0 analog output 14 p2_4 00000 0v to 0v 1 13 p2_3 11011 2.7 v to 2.7v 1 12 p2_2 111x1 on (vcc) standard port function 1 11 p2_1 11110 off (50k to gnd) standard port function 1 10 p2_0 11100 off (switch to gnd) 1 9 p1 0 portswitch port 1 current off 0 1 port 1 current on 8 p0 0 portswitch port 0 current off 0 1 port 0 current on 7 bs1 bs1 bs0 band switch selection bs1 bs0 0 0 osc. 3 + mix 3 on high 0 0 0 1 osc. 1 + mix 1 on low 6 bs0 1 0 osc. 2 + mix 2 on mid 1 1 osc. 3 + mix 2 on mid, high osc. /3 5 cp3 synth. charge- pump current cp=cp0+cp1+c p2+cp3 600 a 0 4 cp2 300 a 0 3 cp1 150 a 1 2 cp0 75 a 0 1 abl1 abl 1 abl 0 anti-backlash pulse width of phase detector pd pulse width abl 1 abl 0 0 0 2.2 ns 0 1 3.2 ns 0 1 0 abl0 1 0 4.4 ns 1 1 5.6 ns
data sheet 50 revision 3.1, 2006-12-19 tua 6045-2 taifun 3 reference table 16 subaddress 02h, reference divider r and crystal oscillator control bit symbol bits v function description defaults 15 not used not used 0 14 rfagc b_off rf agc buffer off disable rf agc buffer 0 13 xtal3 xta l3 xta l2 xtal i/o control xta l3 xta l2 0 0 output off, input on 0 1 output 200 mvpp 12 xtal2 1 0 output 400 mvpp 1 1 output 800 mvpp 1 1 11 xtal1 xta l1 xta l0 xtal i/o control output mode xtal3 or xtal2 =1 xta l1 xta l0 0 0 fout/1 0 0 0 1 fout/2 1 0 fout/4 1 1 fout/8 10 xtal0 xta l1 xta l0 xtal i/o control input mode xtal3=0 xtal2=0 xta l1 xta l0 0 0 xtal_in 0 0 0 1 xtal_in 1 0 xtal_buff 1 1 xtal_buff+amp
data sheet 51 revision 3.1, 2006-12-19 tua 6045-2 taifun 3 reference 9r9 2 9 synthesizer r-counter synthesizer r-counter programmable divider bits: r= 2 9 x r9 + ... + r0 r = 2 ... 1023 0 8r8 2 8 0 7r7 2 7 0 default div. ratio r=64 6r6 2 6 1 5r5 2 5 0 4r4 2 4 0 3r3 2 3 0 2r2 2 2 0 1r1 2 1 0 0r0 2 0 0 bit symbol bits v function description defaults
data sheet 52 revision 3.1, 2006-12-19 tua 6045-2 taifun 3 reference table 17 subaddress 03h, agc control and if signal processing control bit symbol bits v function description defaults 15 sw 0 if switch normal mode 0 1 bypass mixer output tank 14 lp 0 loop thru control normal mode 0 1 bypass saw driver stage 13 v1 v1 v0 vga output power control quiescent current of emitter follower per side v1 v0 12 v0 0 0 5.0 ma 0 1 3.6 ma 1 0 2.1 ma 1 1 1.1 ma 1 1 11 s1 s1 s0 saw driver power control quiescent current for saw driver stage per side s1 s0 10 s0 0 0 9.7 ma 0 1 6.7 ma 1 0 4.7 ma 1 1 2.1 ma 1 1 9 atc 0 rf-agc time constant bit 0.3 a 0 19.0 a 8 pu 0 rf-agc time standby mode if rf-agc in standby (bit6 in register 06h is set) tristate 0 1 200 k ? pull-up 7 al2 al2 al1 al0 nb-agc control nb-agc take over point al2 al1 al0 6 al1 0 0 0 don?t use
data sheet 53 revision 3.1, 2006-12-19 tua 6045-2 taifun 3 reference 5 al0 0 0 1 115 dbv 0 1 0 112 dbv (default) 010 011 don?t use 1 0 0 109 dbv 1 0 1 106 dbv 1 1 0 103 dbv 111 don?t use 4nbe 0 disable nb-agc detector narrowband level detector active 0 1 narrowband level detector does not affect agc 3wbe 0 disable wb-agc detector wideband level detector active 0 1 wideband level detector does not affect agc 2wb2 wb 2 wb 1 wb 0 wb-agc control low/mid/high take over point wb 2 wb 1 wb 0 1 wb1 0 0 0 87 / 77 / 77 dbv 0 wb0 0 0 1 90 / 80 / 80 dbv 0 1 0 93 / 83 / 83 dbv 0 1 0 0 1 1 96 / 86 / 86 dbv 1 0 0 99 / 89 / 89 dbv 101 don?t use 110 don?t use 111 don?t use bit symbol bits v function description defaults
data sheet 54 revision 3.1, 2006-12-19 tua 6045-2 taifun 3 reference table 18 subaddress 04h, dc-dc converter default f dcdc = 4 mhz / (4 +16) = 200 khz, 20% duty cycle bit symbol bits v function description defaults 15 1 output high high current or tristate output high time: high count register dch=sum(dch_i *2 i ); 2 i =1 to 127 t high = dch / f crystal 0 14 dch_6 2 6 0 13 dch_5 2 5 0 12 dch_4 2 4 0 11 dch_3 2 3 0 10 dch_2 2 2 1 9 dch_1 2 1 0 8 dch_0 2 0 0 7 1 output low if bit15 = 0, load count registers; output low time: low count register dch=sum(dcl_i *2 i ); 2 i =1 to 127 t low = dcl / f crystal 0 6 dcl_6 2 6 0 5 dcl_5 2 5 0 4 dcl_4 2 4 1 3 dcl_3 2 3 0 2 dcl_2 2 2 0 1 dcl_1 2 1 0 0 dcl_0 2 0 0
data sheet 55 revision 3.1, 2006-12-19 tua 6045-2 taifun 3 reference table 19 subaddress 06h, mode bytes, test mode and standby control bit symbol bits v function description defaults 15 cpt 0 charge pump test mode control cp is in normal mode (=bipolar) 0 1 cp current sink or source (=monopolar) 14 cpp 0 cp = sinking current if cpt=1 0 1 cp = sourcing current if cpt=1 13 pt 0 ports test mode control ports in normal mode (=bits p0, p1 to ports) 0 1 ports in test mode (=rfagc detector or f pd/2 ) 12 ptsel 0 ports test output select rfagc_wb, rfagc_nb to p0, p1 if pt=1 0 1f pd/2 to p0, p1 if pt=1 1) 11 not used not used 10 not used not used 9 stby9 1 standby for: integrator 1 8 stby8 1 standby for: ifagc 1 7 stby7 1 standby for: saw driver 1 6 stby6 1 standby for: mixer + rfagc 1 5 stby5 1 standby for: ports 1 4 stby4 1 standby for: pll (and rfosc/3) 1 3 stby3 1 standby for: rf oscillator 1 2 stby2 1 standby for: dcdc converter 1
data sheet 56 revision 3.1, 2006-12-19 tua 6045-2 taifun 3 reference 5.5.2 read data registers table 20 subaddress 80h, status 1 stby1 1 standby for: crystal oscillator 0 0 stby0 1 standby for: bias (disables all except bus) 0 1) p0, p1 are outputs for f ref , f div . p0 is output for f ref divided by 2. p1 is output for f div divided by 2. bit symbol bits v function description 7 pof power-on flag =1 after power-on. reset after first read of register 6 lf lock-in flag =1 if lock-in 5 not used 4 rfagc rfagc flag =1 if rfagc is active (< 3v) 3rfagc _nb nb detector flag =1 if nb detector is above threshold =0 if nb detector is below threshold 2rfagc _wb wb detector flag =1 if wb detector is above threshold =0 if wb detector is below threshold 1 p1 port p1 input =1 if p1 is high 0 p0 port p0 input =1 if p0 is high bit symbol bits v function description defaults
data sheet 57 revision 3.1, 2006-12-19 tua 6045-2 taifun 3 reference table 21 subaddress 8eh, chip code ?6045? bit symbol bits v function description defaults 15 cc15 2 15 chip code (binary coded) cc = 2 15 x cc15 + 2 14 x cc14 + ... + 2 1 x cc1 + 2 0 x cc0 0 14 cc14 2 14 0 13 cc13 2 13 0 12 cc12 2 12 1 11 cc11 2 11 0 10 cc10 2 10 1 9 cc9 2 9 1 8 cc8 2 8 1 7 cc7 2 7 1 6 cc6 2 6 0 5 cc5 2 5 0 4 cc4 2 4 1 3 cc3 2 3 1 2 cc2 2 2 1 1 cc1 2 1 0 0 cc0 2 0 1
data sheet 58 revision 3.1, 2006-12-19 tua 6045-2 taifun 3 reference table 22 subaddress 8fh, revision code, advanced with design steps bit symbol bits v function description defaults 15 rc15 revision code (ascii coded) first digit depends on design step 14 rc14 13 rc13 12 rc12 11 rc11 10 rc10 9 rc9 8 rc8 7 rc7 second digit 6 rc6 5 rc5 4 rc4 3 rc3 2 rc2 1 rc1 0 rc0
data sheet 59 revision 3.1, 2006-12-19 tua 6045-2 taifun 3 reference 5.6 measurement circuits 5.6.1 gain (g v ) measurement in low band figure 9 gain (g v ) measurement in low band z i >> 50 ? => v i = 2 x v meas = 80 dbv v i = v meas + 6db = 80 dbv v 0 = v? meas + 17 db (transformer ratio n1:n2 and transformer loss) g v = 20 log(v 0 / v i ) 5.6.2 gain (g v ) measurement in mid and high bands figure 10 gain (g v ) measurement in mid and high bands v i = v meas = 70 dbv v 0 = v? meas + 17 db (transformer ratio n1:n2 and transformer loss g v = 20 log(v 0 / v i ) + 1 db (1 db = insertion loss of balun) 50 ? spectrum analyser device under test sawout lowin sawout v' meas v 0 v i 50 ? c transformer n1 : n2 = 10 : 2 turns n1 n2 50 ? v v meas rms voltmeter 50 ? spectrum analyser device under test sawout midin highin sawout v' meas v 0 v i 50 ? c transformer n1 : n2 = 10 : 2 turns n1 n2 50 ? v v meas rms voltmeter balun 1:1 midin highin
data sheet 60 revision 3.1, 2006-12-19 tua 6045-2 taifun 3 reference 5.6.3 matching circuit for optimum noise figure in low band figure 11 matching circuit for optimum noise figure in low band 5.6.4 noise figure (nf) measurement in low band figure 12 noise figure (nf) measurement in low band 22p 22p 7 turns wire 0.5 mm coil 5.5 mm 1n in out 15p 1n 50 ? semi rigid cable 300 mm long 96 pf/m 33db/100m in out 22p for f rf = 50 mhz loss = 0 db image suppression = 16 db for f rf = 150 mhz loss = 1.3 db image suppression = 13 db device under test sawout lowin sawout c transformer n1 : n2 = 10 : 2 turns n1 n2 noise source noise figure meter nf = nfmeas - loss of matching circuit (db) matching circuit in out
data sheet 61 revision 3.1, 2006-12-19 tua 6045-2 taifun 3 reference 5.6.5 noise figure (nf) measurement in mid and high bands figure 13 noise figure (nf) measurement in mid and high bands 5.6.6 cross modulation measurement in low band figure 14 cross modulation measurement in low band v? meas = v 0 - 17 db (transformer ratio n1:n2 and transformer loss)  wanted output signal at f pix , v o = 100 dbv  unwanted output signal at f snd device under test sawout midin highin sawout c transformer n1 : n2 = 10 : 2 turns n1 n2 midin highin balun 1:1 noise source noise figure meter loss of balun = 1 db nf = nfmeas - loss of balun (db) if filter 50 ? modulation analyser hybrid a b c d device under test sawout lowin sawout v o 50 ? 50 ? 50 ? c transformer n1 : n2 = 10 : 2 turns n1 n2 wanted signal source 50 ? v v' meas rms voltmeter unwanted signal source am = 80%, 1 khz
data sheet 62 revision 3.1, 2006-12-19 tua 6045-2 taifun 3 reference 5.6.7 cross modulation measurement in mid and high bands figure 15 cross modulation measurement in mid and high bands v? meas = v 0 - 17 db (transformer ratio n1:n2 and transformer loss)  wanted output signal at f pix , v o = 100 dbv  unwanted output signal at f snd 5.6.8 ripple susceptibility measurement figure 16 ripple susceptibility measurement hybrid a b c d device under test sawout midin highin sawout balun 1:1 v o 50 ? 50 ? 50 ? c transformer n1 : n2 = 10 : 2 turns n1 n2 wanted signal source midin highin if filter 50 ? modulation analyser unwanted signal source am = 80%, 1 khz 50 ? v v' meas rms voltmeter dc supply stabilizer 5k 1u 240 ripple 2* 22uf 1u ic supply 50
data sheet 63 revision 3.1, 2006-12-19 tua 6045-2 taifun 3 package pg-vqfn-48 6 package pg-vqfn-48 figure 17 pg-vqfn-48 vignette figure 18 pg-vqfn-48 outline drawing you can find all of our packages, sorts of packing and others in our infineon internet page ?products?: http://www.infineon.com/products . dimensions in mm smd = surface mounted device
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